型號(hào)
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頻率范圍
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瞬時(shí)帶寬
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實(shí)時(shí)信號(hào)處理
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采樣速率
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ADC
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動(dòng)態(tài)范圍
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輸入
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內(nèi)存
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信號(hào)范圍
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DC to 1GHz
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100 Hz to 160 MHz
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FPGA-based digital down conversion (DDC) with fractional resampling
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100 S/s to 400 MS/s
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Dual 400 MS/s 16 bit
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>80 dBc
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RF or Dual I/Q
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512 MB (up to 128 MiSamples of complex I/Q data pairs)
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+10 dBm max
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型號(hào)
|
頻率范圍
|
瞬時(shí)帶寬
|
實(shí)時(shí)信號(hào)處理
|
采樣速率
|
ADC
|
動(dòng)態(tài)范圍
|
輸入
|
內(nèi)存
|
信號(hào)范圍
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DC to 300MHz
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100 Hz to 160 MHz
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FPGA-based digital down conversion (DDC) with fractional resampling
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100 S/s to 400 MS/s
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Dual 400 MS/s 14-bit
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>80 dBc
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2 or 4 Differential
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512 MiB
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+ 10 dBm, 0 dBm, -10 dBm, -20 dBm
|
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型號(hào)
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頻率范圍
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頻率分辨率
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交換速度
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不同的 I/Q輸入
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瞬時(shí)帶寬
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在100 kHz 偏移下相位噪聲
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動(dòng)態(tài)范圍
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RF 電平范圍
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|
DC to 6 GHz
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1 Hz
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<1 ms
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+10 dBm to -20 dBm
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160 Mhz
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< -125 dBc/Hz @ 1 GHz
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>80 dBc
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+20dBm to -120dBm
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|