精品人妻一区二区三区麻豆91国产精品亚洲精品日韩|国产成人精品久久久久日韩中文字幕视频一区二区|国产区精品福利在线熟女|xk8134星空传媒|亚洲一区二区精品3399|5566中文字幕一区二区|国产69精品久久久久9999|中文字幕亚洲欧美日韩|国产日韩久久久久精品影院|亚洲国产精品久久久久久久久,果冻传媒精选麻豆人口中文av内射,欧美成人精品一区二区三区在线观看国产91精品肉色丝袜 ,国产日韩欧美一区二区久久精品东北电影制片厂第一部电影

在線客服

200MHz高速數(shù)字輸入\輸出(I/O)卡

The DMI will transfer up to 4GB of unique data continuously at up to 50 Mhz 
Provides for data I/O via the cable at up to 200 Mbytes per second (LVDS differential I/O) Can transfer data indefinitely without host intervention
生產(chǎn)廠商: 迪陽公司代理 產(chǎn)品型號: PCI-DMI32
產(chǎn)品簡介: The DMI will transfer up to 4GB of unique data continuously at up to 50 Mhz Provides for data I/O via the cable at up to 200 Mbytes per second (LVDS differential I/O) Can transfer data indefinitely without host intervention
特性:
  • The DMI will transfer up to 4GB of unique data continuously at up to 50 Mhz
  • Provides for data I/O via the cable at up to 200 Mbytes per second (LVDS differential I/O)
  • Can transfer data indefinitely without host intervention
  • Bi-directional handshake signals can be user defined
  • Buffers may be transmitted or received indefinitely without host intervention
Back to top of page
Description
  • The PCI-DMI32 Board provides a large on-board memory storage and high-speed, 32-bit parallel interface. It is capable of transmitting or receiving data transfers of up to 200 Mbytes per second on the cable.

    The PCI-DMI32 Board includes up to 2GB of DRAM, a cable input/output controller, cable transceivers (differential, LVDS), and a DMA controller. The memory on the card is set to be either accessed from the PCI bus, or dedicated to the cable transfer. The on-board DRAM does not provide real-time access to the data from the PCI while a transfer is in progress. The DRAM is intended to be initialized over the PCI prior to the cable data transfer. When the transfer is enabled, the cable data will be either continuously transmitted from the on-board DRAM, or continuously received into the DRAM. Once the transfer is complete, the DRAM may be again accessed from the PCI bus.

    The transfer controller is designed to allow several different transfer modes. In single transfer mode, a single buffer of data is transferred across the cable and then DRAM control is returned to the PCI bus. The single buffer may start at any address offset within the full 2GB DRAM space, and the transfer buffer size is also defined. In multi-buffer mode, multiple buffers may be transferred across the cable. In this manner, the user can define multiple buffers in the DRAM, which will then be transferred continuously to the cable when the transfer is enabled. On-board interrupts are defined to allow the user to update the start buffer address and buffer transfer size as soon as the transfer of one buffer begins. In this manner, the user can dynamically receive or transmit multiple buffers to/from the DRAM in one continuous transfer. Likewise, a single buffer can be transmitted continuously to the cable simply by not updating the start buffer address and buffer transfer size. This allows a continuous buffer of up to 2GB to be transmitted indefinitely on the cable.
北京迪陽世紀科技有限責任公司 版權(quán)所有 ? 2008 - 2018 著作權(quán)聲明
010-62156134 62169728 13301007825 節(jié)假日:13901042484 微信號:sun62169728
地址:北京市西城阜外百萬莊扣鐘北里7號公寓
E_mail:[email protected] 傳真: 010-68328400
京ICP備17023194號-1 公備110108007750